Flip flops are used to store informaion
Category:
Latches and flip-flops are the basic elements for storing information. One latch or flip-flop can store one bit of information. The main difference between latches and flip-flops is that for latches, their outputs are constantly affected by their inputs as long as the enable signal is asserted. In other words, when they are enabled, their content changes immediately when their inputs change. Flip-flops, on the other hand, have their content change only either at the rising or falling edge of the enable signal. This enable signal is usually the controlling clock signal. After the rising or falling edge of the clock, the flip-flop content remains constant even if the input changes.
NOTE:
RS flipflop (mostly used as LATCH)
Category:
- Asynchronous/Transparent flipflops (Latch)
- Synchronous fliplfops
- SR (Set Reset)
- D (Data or delay)
- T (Toggle)
- JK
Underneath hardware:
- NOR based (eg. SR latch)
- NAND based (eg. SR' latch)
Methods of describing
- Characteristic table / Truth table
R
|
S
|
Q(next)
|
Action
|
0
|
0
|
Q
|
Hold state
|
0
|
1
|
1
|
Set
|
1
|
0
|
0
|
Reset
|
1
|
1
|
0
|
Not allowed as Q = Q’ = 0
|
- Excitation table
Q
|
R
|
S
|
Q(next)
|
0
|
x
|
0
|
0
|
0
|
0
|
1
|
1
|
1
|
1
|
0
|
0
|
1
|
0
|
x
|
1
|
Latches and flip-flops are the basic elements for storing information. One latch or flip-flop can store one bit of information. The main difference between latches and flip-flops is that for latches, their outputs are constantly affected by their inputs as long as the enable signal is asserted. In other words, when they are enabled, their content changes immediately when their inputs change. Flip-flops, on the other hand, have their content change only either at the rising or falling edge of the enable signal. This enable signal is usually the controlling clock signal. After the rising or falling edge of the clock, the flip-flop content remains constant even if the input changes.
NOTE:
- When the device is latch/Gate we define it by Truth table
- When the device is flip-flop we define it by Excitation table
States of output:
- HIGH
- LOW
- No change
- Indeterminate
- Race around
State of Input:
- HIGH
- LOW
- Don't care
RS flipflop (mostly used as LATCH)
R
|
S
|
Q
|
Q’
|
Comment
|
0
|
0
|
0
|
1
|
No Change
|
0
|
1
|
1
|
0
|
Q Change to 1 as ‘S’ is 1 (Set State)
|
0
|
0
|
1
|
0
|
No Change
|
0
|
0
|
1
|
0
|
No Change
|
1
|
0
|
0
|
1
|
Q Change to 0 as ‘R’ is 1 (Reset State)
|
0
|
0
|
0
|
1
|
No change
|
1
|
1
|
0
|
0
|
Not allowed. In this state Q = Q’
|
0
|
0
|
?
|
?
|
If both R and S change from 11 to 00 then its indeterminate state
|
SR flipflop is the basic building block for computer memories
D-flipflop (mostly used as LATCH)
Major drawback of SR latch (indeterminate state and Not allowed state) are overcome by D-flipflop
D is a synchronous input
S' and R' are asynchronous inputs
JK-flipflop (mostly a flipflop +ve edged or -ve edged)
D is a synchronous input
S' and R' are asynchronous inputs
JK-flipflop (mostly a flipflop +ve edged or -ve edged)
J
|
K
|
Q(next)
|
Q’(next)
|
Action
|
0
|
0
|
Q
|
Q
|
Hold state
|
0
|
1
|
J
|
K
|
J
|
1
|
0
|
J
|
K
|
K
|
1
|
1
|
Q’
|
Q
|
Toggle
|
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