Function pointer use & What are callback functions ??

Function pointers are basically used in callback function, to call a particular function when a event occurs.
Callback functions are ISR(interrupt service routines) when it comes to non-os based embedded systems.

Example of using funtion pointer in C program:

---------------------
user_main.c
---------------------
*
 * user_main.c
 *
 *  Created on: 23-Feb-2016
 *      Author: root
 */


#include <stdio.h>
#include <user_include.h>

int main(int argc, char *argv[]){
Demo d;
d.input_string = "Jon snow";
d.print_data_pointer = data_print_1;
printer_function(&d);
d.print_data_pointer = data_print_2;
printer_function(&d);
return 0;
}


void data_print_1(char *inp){
printf("\n You Know Nothing,... %s ", inp);
}

void data_print_2(char *inp){
printf("\n You know everything, ... %s", inp);
}

void printer_function(Demo *temp){
temp->print_data_pointer(temp->input_string);
}


----------------------
user_include.h
----------------------
/*
 * user_include.h
 *
 *  Created on: 23-Feb-2016
 *      Author: root
 */

#ifndef USER_INCLUDE_H_
#define USER_INCLUDE_H_

/*
 * typedef
 */
typedef signed char int8;
typedef unsigned char uint8;
typedef signed int int32;
typedef unsigned int uint32;

typedef struct{
void (*print_data_pointer)(char *);
char *input_string;
}Demo;

/*
 * Function declaration
 */
void data_print_1(char *);
void data_print_2(char *);
void printer_function(Demo *);

#endif /* USER_INCLUDE_H_ */

****** OUTPUT ******

You Know Nothing,... Jon snow 

You know everything, ... Jon snow

Latch and Flip flop difference

Flip flops are used to store informaion

Category:

1. Asynchronous/Transparent flipflops (Latch)
2. Synchronous fliplfops

Types:

1. SR (Set Reset)
2. D (Data or delay)
3. T (Toggle)
4. JK

Underneath hardware:

1. NOR based (eg. SR latch)
2. NAND based (eg. SR' latch)

Methods of describing

• Characteristic table / Truth table

R	S	Q(next)	Action
0	0	Q	Hold state
0	1	1	Set
1	0	0	Reset
1	1	0	Not allowed as Q = Q’ = 0

• Excitation table

Q	R	S	Q(next)
0	x	0	0
0	0	1	1
1	1	0	0
1	0	x	1

Latches and flip-flops are the basic elements for storing information. One latch or flip-flop can store one bit of information. The main difference between latches and flip-flops is that for latches, their outputs are constantly affected by their inputs as long as the enable signal is asserted. In other words, when they are enabled, their content changes immediately when their inputs change. Flip-flops, on the other hand, have their content change only either at the rising or falling edge of the enable signal. This enable signal is usually the controlling clock signal. After the rising or falling edge of the clock, the flip-flop content remains constant even if the input changes.



NOTE:

1. When the device is latch/Gate we define it by Truth table
2. When the device is flip-flop we define it by Excitation table

States of output:

1. HIGH
2. LOW
3. No change
4. Indeterminate
5. Race around

State of Input:

1. HIGH
2. LOW
3. Don't care

RS flipflop (mostly used as LATCH)

R	S	Q	Q’	Comment
0	0	0	1	No Change
0	1	1	0	Q Change to 1 as ‘S’ is 1 (Set State)
0	0	1	0	No Change
0	0	1	0	No Change
1	0	0	1	Q Change to 0 as ‘R’ is 1 (Reset State)
0	0	0	1	No change
1	1	0	0	Not allowed. In this state Q = Q’
0	0	?	?	If both R and S change from 11 to 00 then its indeterminate state

SR flipflop is the basic building block for computer memories

D-flipflop (mostly used as LATCH)

Major drawback of SR latch (indeterminate state and Not allowed state) are overcome by D-flipflop

D is a synchronous input
S' and R' are asynchronous inputs

JK-flipflop (mostly a flipflop +ve edged or -ve edged)

J	K	Q(next)	Q’(next)	Action
0	0	Q	Q	Hold state
0	1	J	K	J
1	0	J	K	K
1	1	Q’	Q	Toggle

CAN protocol information

• CAN control area network
• Introduced by "Robert Bosch"
• It has 3 layers of OSI model:
• Physical layer (CAN Transceiver SN65HVD233)
• Data link layer (CAN Controller MCP2515)
• Application layer (Higher level protocols are implemented

Specifications:

ISO 11898

Specification is related to only following two layers

1. Physical layer
2. Data link layer

Physical connection:

2 wire interface

uC <---SPI 4---> CAN controller <---Tx & Rx ---> CAN Transceiver <--CANH & CANL

two 120ohm termination resistors are connected on the basis of transmission line theory.

CAN packet description:

• Standard

SOF(1) + ID(11) + RTR(1) + IDE(1) + RB0(1) + DLC(4) + DataFrame(8*n where 0<=n<=8) +  CRC(15) + CRCdel(1) + ACK slot(1) + ACKdel(1) + EOF(7) + IFS(3)

• Extended

SOF(1) + ID(11) + SRR(1) + IDE(1) + ID(18) + RTR(1) + RB1(1) + RB0(1) + DLC(4) + DataFrame(8*n where 0<=n<=8) +  CRC(15) + CRCdel(1) + ACK slot(1) + ACKdel(1) + EOF(7) + IFS(3)

Dominant bit = 0 logic

Recessive bit = 1 logic

Bit stuffing - if there are more than 5 consecutive dominant bits then bit stuffing mechanism is used to send a recessive bit so as to maintain the synchronization

CAN frame types:

1. standard
2. extended
3. remote request
4. errror (active & passive)
• CRC error
• acknowledgement error
• form error
• bit error
• stuff error
5. overload

CANOpen

Its a application layer protocol

1. Communication profile (CiA DS-301): The communication profile provides the means to configure devices and communication data and defines how data is communicated between devices.
2. Device profile (CiA DSP-401): 

Device profiles add device-specific behavior for (classes of) devices (e.g. digital I/O, analog I/O,  motion controllers, encoders, etc.)

Design patterns

Proper code design has following advantages:

1. speed up development process by providing tested, proven development paradigms
2. to prevent major issues in later stage of project
3. improves code readability for coders familiar with pattern
4. helps developers to communicate using well known terms
5. makes the design robust

Design patterns types:

1. Creational
• Class creational pattern (use inheritance effectively)
• Object creational pattern (use delegation effectively)
2. Structural
3. Behavioral

Reference: https://sourcemaking.com/design_patterns